Hi!
I have some vague notion of reading somewhere that you could group pins together to form a parallel data bus on the version 2 boards but I can't find that info now and could be that was only a feature of the CPU itself and hasn't been made available to managed code yet. Perhaps someone can correct me on this?
So from what I know, the short answer would be no, I don't think there's any parallel bus.
...but - there are plenty of different solutions involving some external component. For example, with a shift register you can create a virtually parallel bus using SPI to drive it. You might want to look at the 74F166 which is an 8 bit bidirectional shift register:
http://www.nxp.com/d...heet/74F166.pdf
Also there's the PCF8574 8 bit quasi-bidirectional I2C I/O expander which is easy to use. Both of these ICs are available in breadboard friendly DIP16 packages.
For the latter, I've written a driver class and I2C bus manager that can be found in this post