I have toyed with the idea of doing this with mine. Mine use some really basic RF encoders/decoders. The only real issue I ran into was that there was no real way to get any realtime status from the fans without modifying the fans themselves. At that point I would just use an xbee transceiver or wifi to control them. But I never went any further than that with mine due to the lack of time and that my landlord might not like me messing with them like that.
- Netduino Forums
- → KodeDaemon's Content
There have been 10 items by KodeDaemon (Search limited from 25-January 19)
This is a typical case where a logic analyzer does not help at all, but an oscilloscope does.
The SPI is not buggy: I tested two different small programs right now, and one is the above program. The CS timings are correct, as the SCK and the MOSI signals are.
Instead, the problem is related to the different design choice about the I/Os in the ST: this has been already described by Chris, few posts above. While Atmel (old Netduino) chose for ensuring a pull-up, ST chose for leave an input floating. This time I prefer the Atmel engineers choice, other the Italian-ST solution.
However, leaving an I/O floating leads to an unpredictable behavior when that I/O is connected to an HCMOS input. Let's say that while the Atmel guys offered an internal pull-up, ST team tells that you must provide your own pull-whatever...okay, just viewpoints: it's much like guessing the gender of the angels.
The logic analyzer does not understand half-a-way levels, and shows only boolean states. Since the actual voltage is raising/falling smoothly, the LA (as the chips) reads it as a "delay", but it is not related to any bug.
How to solve it?
The simplest yet best way to solve the problem is...adding a pull-up to *any* I/O that might turn to a floating state. I'd place a 5-10k resistor to +5V (or +3.3V) to SCK, MOSI, MISO, and any CS. That's for HC595 chips.
Note that there's NO a general rule for choosing between a pull-up or a pull-down: it depends on the external logic, and to the desired behavior.
Hope it helps.
Thank you Mario, this is an excellent explanation of what people are seeing with their logic analyzers.
With the Netduino Plus V2 is one problem solved, more memory. One to go the serial invert Rx.Tx.
We want to beat the Arduino in every way. We are looking forward when the Netduino V2 is available in the Netherlands.
The alternate function mappings are fixed to specific peripherals and functions for each pin, there isn't a hardware way to invert Rx and Tx. Though, using a custom software library and bypassing the hardware peripheral, you should be able to.
Well played sir!