Ward

Hi Quiche
I'll put the build document on my to-do list, but the shield does come with that core already loaded and the binary (bitstream) is available, so it's not strictly necessary to even install Webpack. Should anyone want to, though, the source is all here (github). No plans to sell through Amazon.uk at the moment, we've been handling international sales ourselves. Given the international volume we're seeing, though, it might be time to investigate it.
--Ward

Building on the expert work of Quiche31 (and anyone else who's contributed to his fine webserver codebase), I put together a simple user interface that allows one to control most of the facilities of the ÜberShield FPGA shield (http://ubershield.com) using a Netduino Plus with the "extra RAM" beta build.  UberWeb.png   36.8KB   169 downloads The form allows you to change the type of each pin as well as its parameters (PWM settings, high/low state). You can also change the PWM terminal count as well as the state of the LEDs on the shield. To view a pin's settings, type the pin number in to the "Pin number" box and remove focus (i.e. click elsewhere)...the page should update automatically. The basic intent of this is to allow users to try out different PWM settings more or less real-time. To make it go, simply plug in the ÜberShield, download the code to your ND+ and point a browser at its IP address. Might be helpful to have LEDs hooked up to a few of the pins so you can see what's going on. Also, I haven't performed much entry validation, so caveat emptor there (i.e. don't try to set pins above 32 to PWM).

I'm very happy to report that we are now shipping the FPGA shield, with a new name: ÜberShield. Boards are in stock at Amazon.com, and more information can be found at the product website http://ubershield.com and in our forums at http://forums.ubershield.com. The final product specs are essentially the same as above, although the 50 MHz clock oscillator has been replaced with a 25 MHz model. At present, the board is shipping with a combination GPIO/PWM core. All 64 of the dedicated header digital pins are available for either input or output, and 32 of them are also able to generate PWM signals. The PWM engine has 32 bit/1us resolution, meaning your pulse width and period can range from 2us to 1 hour, 11 minutes, and 34.967296 seconds, in 1us steps. In addition, all 32 PWM channels are time-aligned, and there's a master "terminate" count, so you can create complex waveforms like stepper motor control sequences. Further discussion and some examples are in the ÜberShield forums. A full Netduino library is available to support the GPIO and PWM functionality. In addition, should you want to write your own core in Verilog/VHDL or using Xilinx's schematic capture tool a bitstream loader is available for the Netduino and Netduino Plus. This allows you to transfer your design into the FPGA without using a specialized JTAG cable.