206 replies to this topic

[Magpie]

thats an important cap. the digikey part will be fine. The only two sizes I used are 805 and 1206 so the big ones are 1206. I think all the caps are 805 but the resistors are mostly 1206. the 0.1ohm are 1206 I think. different board houses have different ordering requirements I have been using Seeed Studio (very very cheap but they have a few hoops to jump through). Make sure after plotting you view in Gerber viewer. It should be 6 layers + the drill file. Put them all in the gerber veiwer together and check alignment of the holes and tracks. Make sure everything sits on top of one another. the layers are. Copper top and bottom solder mask top and bottom. this layor covers most of the board except where you need to solder. silkscreen top and bottom. To plot gerbers press plot and use defaults. There is a tute on this out there. Basically I just use defaults. Dont invert the Y axis. Also put the board edges onto the plots. plotting is actually quite easy. I just sent off steff3 to Seeed. ( 2channels, 36V, 100mm x 50mm board, black) Hopefully this is the One. Steff2 was too big and too green. Hard to put into a light fitting. Edit : oh and dont forget to put mount holes in, like they did with raspberry pi. I use a model called '1pin' which has a drill hole of 1/8 inch. This will let you use 3mm screws and rivets.

Edited by Magpie, 30 October 2012 - 02:27 AM.

[mcinnes01]

Hi, I've attached my board hopefully for final checking? I added some drill holes, I will probably relay the board slightly once I have tested one working. In my gerber I also have a .pho do I need to exclude this? Got the c1 added to my bom on digikey. Just need to add the connectors and find my inductors again now. May also need to do some final checking of the FET foot prints I remember you said something on your first test about this? If so what am I likely to need to adjust? Finally how do I know how big my board will be? Yours sounds a nice size, did seeed do the black finish? Cheers, Andy

Attached Files

•  New folder.zip   156.67KB   3 downloads

[Magpie]

I added some drill holes, I will probably relay the board slightly once I have tested one working.

It is hard not to make a mistake on a board. You will definitely see improvements you will want.

the Gerber lines up properly, I don't know about the .pho file.

Just make sure the foot prints of the stuff you order matches the ones on your board.

In steff2 I ordered D2Pak fets but had footprints for DPak fets luckily this mistake wasn't critical as I could force them on.


If you want to use Seeed Studio then I would scrape off approximately 1.1mm of the height of your board. It will save you money.
If you use someone else it may not matter.

Height : 30.4 -> 82.5 = 51.1mm

Width: 123.2 -> 261.6 = 138.4mm

Seeed Studio use 50mm increments for pricing.

In kicad there is a yellow pcb edge layer, right click on the lines and edit the y value to make it 50mm long.

Follow the instructions from Seeed Studio to the letter, for you first spin use green it is cheaper.
If you cut the board down to 50mm x 138mm then you can buy the 5cm x 15cm option from seeed.



PCB Cart is another place.

But I think UK has a lot of manufacturers too.

[mcinnes01]

I am just checking through my BOM and the foot prints, think I might try batch pcb, I like sparkfun and their website is good in that you can upload and save gerber files and it has its own drc built in. Also for the $4 extra I think it is worth it for the ease of use.

I am going to get my parts ordered as soon as I finish checking so hopefully some time this week, I will order enough for 10 boards I think as I can always use them on subsequent revisions if this board doesn't work out.

Would you order extra of any components e.g. resistors, caps etc?

L1 the 100u inductor, on digikey the footprint is 1007 (2518 Metric) on KiCad this is IND_SM I'm not sure how to tell if this is correct?

Do you have any suggested fuse parts on digikey?

I have changed the D5 foot print as I found it was wrong and should have been DO-214.

I also checked my FET are DPAK as per my pcb.

Will these fit in the foot print c_elec_6.3x7.7 and will they be ok for my board?

Attached is my final board design and my shopping cart is ready to go.

Thanks as ever and hopefully everything will go well once I get all the parts and boards!

Andy

Attached Files

•  New folder3.zip   71.21KB   2 downloads

[Magpie]

I thing I found useful was a SMD resistor and capacitor book. It cost about $35 from Ladyada I think, but many people sell them, they hava all SM805 foot prints in useful ranges. I will look when I get the chance. I have finally convinced my boss to let me design a board for work. Solar battery charger just 20W. I better not stuff it up. He wants me to use MyroPCB, they do a fair bit of manufacture for us. I am not sure, if they will fit, as there is no footprint. If it is metal under those inductors then you will have to watch for shorting via the inductor sheild if the pads dont fit properly. But if the boards came back and were wrong it wouldn't be such a problem as you could put down the flimsiest layer of plastic or paper to insulate this and then solder around it. the little inductor under the ic might need to move closer to the edge, maybe half a pin pitch. just so it doesn't get blocked by the ic socket. I would put + and - on the silkscreen top layer for each connector. but outside of the footprint so that you can easily work out +- when you are plugging. Use the text tool in Kicad.

Edited by Magpie, 02 November 2012 - 04:39 AM.

[mcinnes01]

Thats cool, a solar battery charger hey! I wish I could tinker at work. You could use it for powering a netduino probably a bit like this by Atlas.

I have their PH stamp for my aquarium controller I am building, they use really small footprints to the point the BNC connector is about the same size as the board!

It may give you some feature ideas?

The inductors looks like it 10mm wide and 12mm long, ignoring their round shape the feet sit in the middle of the 10mm edges and are about 2mm square.

I guess I could/should probable try editing the foot print on the board for them right?

I will definitely but the + - on the silkscreen that is a good idea.

Just going to few about 12 house now, what a Saturday! But I will make the amends and catch up later.

Cheers

Andy

[Magpie]

I think they will solder alright, it is just that if the pads are too big they may short out through the iron shield.
But if you just put a tiny square of insulator underneath, you can solder on both legs any way. It's a bit of a bodge but will work if the footprint is wrong.

Just going to few about 12 house now, what a Saturday! But I will make the amends and catch up later.

Does that mean you've been drinking for 12 hours? Don't fall in the aquarium, I am picturing some sort of James Bond evil villain type of aquarium.

what those atlas guys say about remote monitoring, is so true.

[mcinnes01]

Sorry poor rushy typing = typos, I went to view 12 houses today, I'm in the process of buying a house although 12 hours of drinking would have been a preferred option over looking at houses all day. I had a go at creating my own foot print for the inductors, it isn't perfect by any stretch and I couldn't for the life of me work out how to get some form of measurement or ruler on the component editor? Any way I pushed it back in to my pcb, removed the zone fill, deleted the old tracks, moved the led 2 connector over a whisker, drew new track, refilled the zones and ran the DRC. I now find a load of errors that weren't there before on other parts of the board and I have no idea why or how to get rid of them. I noticed this previously when I have been playing around, any tips? Do you think those inductors cut the mustard for the job any way? Cheers, Andy

[Magpie]

If you edit the pad in the component editor it gives you the offset x and y and the size x and y of the pad. I found editing these text boxes to be the easiest method. The hardest bit is saving it into the correct library and loading the module back into the board, which you have done. I dont know if the inductors are any good. The bigger the inductor the less heat and higher efficiency, but higher cost and space, you have to weigh it up. Make sure it has a saturation current of at least 2amps. I managed to clear up all my errors, do you have an unconnected track? If you do the location of it will probably not be where you expect because the software doesn't know where exactly the net is separated, because it is separated everywhere. If you want I can probably fix it for you, but I need a zip with all main files + any special libraries and modules. Take your time buying your house, a bargain will come along.

[mcinnes01]

Hi,

I have had a play around and moved the inductors and output connectors, I decided since you mentioned the the pads can be offset, to leave the original inductor footprints in. I found some new inductors that have better ratings, the footprint of these are 12mm by 12mm in the same case format as the ones you used (the kind of square with rounded edges ones).

These new inductors are rated to 3amps, I have moved the connectors to leave enough room for them but obviously the footprints are wrong still.

Again when I relaid the tracks and filled the zones I got a load of issues popped up on other parts of the board that weren't anywhere near the parts I had made changes to?

I have attached where I am up to so perhaps you can see what I am doing wrong? There are a few files in the folder the latest version of the board file is the one dated the 4th and called stteff35vgnda.

These are the errors I am getting:

** Found 34 DRC errors **
ErrType(17): Two track ends
@ (225.108 mm,46.863 mm): Track 1.300 mm [5v] on Front Net:1 Length:1.654 mm
@ (222.834 mm,47.104 mm): Track 1.801 mm [N-000013] on Front Net:12 Length:0.439 mm
ErrType(18): Two track ends
@ (206.502 mm,68.072 mm): Track 0.500 mm [5v] on Front Net:1 Length:0.716 mm
@ (205.232 mm,68.072 mm): Track 0.249 mm [PWM1] on Front Net:28 Length:10.414 mm
ErrType(16): Two track ends
@ (205.994 mm,67.564 mm): Track 0.500 mm [5v] on Front Net:1 Length:27.432 mm
@ (205.232 mm,57.658 mm): Track 0.249 mm [PWM1] on Front Net:28 Length:5.207 mm
ErrType(5): Track near via
@ (187.960 mm,42.926 mm): Track 0.399 mm [5v] on Front Net:1 Length:11.938 mm
@ (187.198 mm,43.942 mm): Via 0.889 mm [_Rst] Net:36
ErrType(5): Track near via
@ (173.627 mm,62.847 mm): Track 0.249 mm [Dimmer1] on Front Net:3 Length:1.770 mm
@ (175.006 mm,62.738 mm): Via 0.889 mm [Gnd] Net:6
ErrType(16): Two track ends
@ (199.659 mm,73.914 mm): Track 0.249 mm [Gnd] on Front Net:6 Length:15.225 mm
@ (201.676 mm,73.152 mm): Track 0.249 mm [N-000014] on Front Net:13 Length:0.358 mm
ErrType(17): Two track ends
@ (218.440 mm,73.914 mm): Track 0.249 mm [Gnd] on Front Net:6 Length:1.077 mm
@ (199.451 mm,74.422 mm): Track 0.249 mm [N-000017] on Front Net:14 Length:42.103 mm
ErrType(11): Two track ends
@ (214.884 mm,73.914 mm): Track 0.249 mm [Gnd] on Front Net:6 Length:2.540 mm
@ (201.930 mm,73.406 mm): Track 0.249 mm [N-000014] on Front Net:13 Length:15.748 mm
ErrType(9): Two track ends
@ (241.300 mm,73.914 mm): Track 0.249 mm [Gnd] on Front Net:6 Length:4.669 mm
@ (241.554 mm,74.422 mm): Track 0.249 mm [N-000017] on Front Net:14 Length:5.027 mm
ErrType(18): Two track ends
@ (197.874 mm,70.602 mm): Track 0.249 mm [Gnd] on Front Net:6 Length:1.527 mm
@ (197.419 mm,72.390 mm): Track 0.249 mm [N-000017] on Front Net:14 Length:2.873 mm
ErrType(18): Two track ends
@ (244.602 mm,66.548 mm): Track 0.249 mm [Gnd] on Front Net:6 Length:0.716 mm
@ (244.348 mm,65.532 mm): Track 0.249 mm [N-000017] on Front Net:14 Length:2.286 mm
ErrType(10): Two track ends
@ (134.135 mm,66.063 mm): Track 0.249 mm [Gnd] on Front Net:6 Length:5.354 mm
@ (137.414 mm,70.104 mm): Track 0.249 mm [N-000034] on Front Net:22 Length:7.183 mm
ErrType(12): This looks bad
@ (133.985 mm,65.959 mm): Track 0.249 mm [Gnd] on Front Net:6 Length:0.145 mm
@ (137.414 mm,70.104 mm): Track 0.249 mm [N-000034] on Front Net:22 Length:7.183 mm
ErrType(10): Two track ends
@ (217.424 mm,73.914 mm): Track 0.249 mm [Gnd] on Front Net:6 Length:1.016 mm
@ (201.930 mm,73.406 mm): Track 0.249 mm [N-000014] on Front Net:13 Length:15.748 mm
ErrType(12): This looks bad
@ (214.884 mm,73.914 mm): Track 0.249 mm [Gnd] on Front Net:6 Length:0.254 mm
@ (201.930 mm,73.406 mm): Track 0.249 mm [N-000014] on Front Net:13 Length:15.748 mm
ErrType(4): Track near pad
@ (175.006 mm,62.738 mm): Track 0.249 mm [Gnd] on Back Net:6 Length:2.794 mm
@ (176.149 mm,61.595 mm): Pad [11] (all copper layers) of IC1
ErrType(17): Two track ends
@ (140.208 mm,73.660 mm): Track 0.249 mm [Gnd] on Front Net:6 Length:3.231 mm
@ (174.752 mm,74.168 mm): Track 0.249 mm [N-000034] on Front Net:22 Length:34.798 mm
ErrType(14): Two track ends
@ (244.094 mm,66.040 mm): Track 0.249 mm [Gnd] on Front Net:6 Length:1.651 mm
@ (244.348 mm,65.532 mm): Track 0.249 mm [N-000017] on Front Net:14 Length:2.286 mm
ErrType(18): Two track ends
@ (197.874 mm,72.128 mm): Track 0.249 mm [Gnd] on Front Net:6 Length:2.525 mm
@ (199.451 mm,74.422 mm): Track 0.249 mm [N-000017] on Front Net:14 Length:42.103 mm
ErrType(17): Two track ends
@ (244.602 mm,70.612 mm): Track 0.249 mm [Gnd] on Front Net:6 Length:4.064 mm
@ (241.554 mm,74.422 mm): Track 0.249 mm [N-000017] on Front Net:14 Length:5.027 mm
ErrType(17): Two track ends
@ (137.922 mm,71.374 mm): Track 0.249 mm [Gnd] on Front Net:6 Length:0.046 mm
@ (139.954 mm,74.168 mm): Track 0.249 mm [N-000034] on Front Net:22 Length:3.592 mm
ErrType(18): Two track ends
@ (133.985 mm,63.754 mm): Track 0.249 mm [Gnd] on Front Net:6 Length:2.205 mm
@ (137.414 mm,70.104 mm): Track 0.249 mm [N-000034] on Front Net:22 Length:7.183 mm
ErrType(16): Two track ends
@ (137.922 mm,69.850 mm): Track 0.249 mm [Gnd] on Front Net:6 Length:1.524 mm
@ (137.414 mm,70.104 mm): Track 0.249 mm [N-000034] on Front Net:22 Length:7.183 mm
ErrType(17): Two track ends
@ (174.412 mm,73.660 mm): Track 0.249 mm [Gnd] on Front Net:6 Length:3.216 mm
@ (176.530 mm,72.390 mm): Track 0.249 mm [N-000034] on Front Net:22 Length:2.512 mm
ErrType(4): Track near pad
@ (192.532 mm,62.992 mm): Track 0.249 mm [Gnd] on Front Net:6 Length:2.286 mm
@ (191.389 mm,61.595 mm): Pad [17] (all copper layers) of IC1
ErrType(11): Two track ends
@ (175.725 mm,72.347 mm): Track 0.249 mm [Gnd] on Front Net:6 Length:1.857 mm
@ (176.530 mm,72.390 mm): Track 0.249 mm [N-000034] on Front Net:22 Length:2.512 mm
ErrType(9): Two track ends
@ (140.208 mm,73.660 mm): Track 0.249 mm [Gnd] on Front Net:6 Length:30.988 mm
@ (174.752 mm,74.168 mm): Track 0.249 mm [N-000034] on Front Net:22 Length:34.798 mm
ErrType(10): Two track ends
@ (217.424 mm,73.914 mm): Track 0.249 mm [Gnd] on Front Net:6 Length:23.876 mm
@ (201.930 mm,73.406 mm): Track 0.249 mm [N-000014] on Front Net:13 Length:15.748 mm
ErrType(17): Two track ends
@ (134.089 mm,66.063 mm): Track 0.249 mm [Gnd] on Front Net:6 Length:0.046 mm
@ (137.414 mm,70.104 mm): Track 0.249 mm [N-000034] on Front Net:22 Length:7.183 mm
ErrType(7): Via near track
@ (218.694 mm,72.390 mm): Track 0.249 mm [N-000014] on Front Net:13 Length:10.414 mm
@ (219.202 mm,73.152 mm): Via 0.889 mm [Gnd] Net:6
ErrType(4): Track near pad
@ (177.800 mm,62.738 mm): Track 0.249 mm [Gnd] on Back Net:6 Length:2.032 mm
@ (178.689 mm,61.595 mm): Pad [12] (all copper layers) of IC1
ErrType(18): Two track ends
@ (196.522 mm,63.680 mm): Track 0.249 mm [Gnd] on Front Net:6 Length:1.692 mm
@ (194.818 mm,62.484 mm): Track 0.249 mm [Sense2] on Front Net:33 Length:1.908 mm
ErrType(4): Track near pad
@ (195.326 mm,62.484 mm): Track 0.249 mm [Gnd] on Front Net:6 Length:2.286 mm
@ (196.469 mm,61.595 mm): Pad [19] (all copper layers) of IC1
ErrType(18): Two track ends
@ (175.725 mm,70.800 mm): Track 0.249 mm [Gnd] on Front Net:6 Length:1.547 mm
@ (176.530 mm,72.390 mm): Track 0.249 mm [N-000034] on Front Net:22 Length:2.512 mm

** Found 1 unconnected pads **
ErrType(2): Unconnected pads
@ (140.907 mm,46.101 mm): Pad [2] (Front) of C16
@ (142.570 mm,38.468 mm): Pad [1] (all copper layers) of P4

** End of Report **

Found a few potential houses, so hopefully will put an offer in this week, I have to move by February as our landlady is going travelling so its a good push to get something sooner rather than later, lets just hope the cheeky over I'm planning on putting in is accepted.

Cheers,

Andy

Attached Files

•  steff35v.zip   1.25MB   2 downloads

[Magpie]

Hi edit: sorry I probably wrecked the kelvin connections I did fix it up. I emailed you the brd and the gerbers. to save on my upload space. The problem was a few unconnected tracks that were actually connected but the DRC isn't smart enough to realise. there was only 3 but the the DRC thought there was heaps. The problems (gotchas would be more accurate) were caused by the grid settings, nets wont be connected unless they snap to the grid. if you change grid settings some of your pads will no longer snap. Also Kicad doesn't seem to remember your grid settings so you have to change it whenever you open up. Try to use the same one or two all the time. I had to go down to the very lowest to get one track to snap. The other problem is not actually a problem with the board but with Kicad. the DRC doesn't understand the copper areas and that everything inside is connected. So work around this I just join the unconnected ground pins on the underside of the board with thin tracks until the DRC says no errors. The actual copper pattern ends up being the same. Its like programming, get rid of the warnings so you can see important ones when they eventuate. Also a put vias into a lot of the ground pads, which I have only just learned how to do. Apparently my steff3, 2 channel, 36 volt, Black boards are finished manufacture and are returning to me.

Edited by Magpie, 05 November 2012 - 12:01 PM.

[mcinnes01]

Thanks thats great! I couldn't get my head around these errors, but the ground tip is a really good idea! I've had a look at the board you sent and checked around and everything seems fine. The only thing I needed to check, do I need to offset the Inductor footprints for the 3x 33uh inductors as the new inductors are 12mm wide with the pads being along either side of the inductor. I tried editing the pad offset, but every time I pressed OK, and went back in to the settings, it had gone back to zero? I also need to finish of the silk screen. Do you think the little L1 inductor is ok where it is? If I move it, I think it will be between grids so may cause some snap to issues again. Once the above are answered, other than that do you think I am ready to give the board a test run? I really like the sound of your black boards they will look amazing! Are they gloss or matt black? I too am not a big fan of the green boards, they look old fashioned. Also with your boards are they for one light fitting and if so how do you plan to use the control of 2 channels and what enclosures are you thinking ok? 36v I guess is 10 leds per channel right, in which case they are some pretty powerful fixtures right? Once I have finished this board and soldered one up, I am going to start on the TLC5940 board, I have nearly finished putting it on matrix board but it really isn't an elegant solution and I much prefer the idea of having a proper board. Let me know how you get on with your new boards, out of interest I know you have dropped a channel, but how small do you think I could realistically drop these boards to? I don't know if I definitely will, especially if these boards work, but I may lay it all out on one big board eventually with the TLC board built in and the power distribution for the 30 channels will be much more elegant and a lot of the connectors could be dropped. I could essentially get away with a GO! bus connector and a power plug, but this really is dreaming ahead! Thanks again I'm really grateful for all your help, Andy

[Magpie]

Hi

I think you should build something soon, but I have a different idea for you for control.

the netduino can talk SPI and the attiny can talk SPI. so you could drop the tlc5940s completely.

Just have the netduino set the dimming level direct to the attiny via SPI. The only trouble with this is you would loose one channel of PWM, giving you two outputs per attiny.
Although if you can handle a small blink while the communication is done you could have 3 channels.

Also I have never written any SPI code in AVR so you would be on your own there.

L1 will be ok, it just needs to fit mechanically and I think it will fit but it will be tight.
If it doesn't fit you can easily make it fit by soldering L1 just off centre or filing a small notch into the ic socket.
You understand you need to use a socket dont you? I am not sure if I made this clear.

I tried editing the pad offset, but every time I pressed OK, and went back in to the settings, it had gone back to zero?

Right click on the footprint and Open the footprint in the module editor. Set the working library to say 'Andrew' and put all your mods as you do them in here. Create a new part from what is in the editor and save it into your footprint library. At this point you can save it as you make changes. Once it is done then delete the old footprints and place the new footprints into your pcb. The tracks may be no longer connected, so reconnect them using your knowledge of grids and snap to.

One day when I get something looking good made I will post about my latest version, hopefully soon.

Let me know how you get on with your new boards, out of interest I know you have dropped a channel, but how small do you think I could realistically drop these boards to? I don't know if I definitely will, especially if these boards work, but I may lay it all out on one big board eventually with the TLC board built in and the power distribution for the 30 channels will be much more elegant and a lot of the connectors could be dropped. I could essentially get away with a GO! bus connector and a power plug, but this really is dreaming ahead!

Yes I think before the final board is built you could optimise, but it is so hard to get the perfect design from scratch. It is iterative and I think 2 iterations will be your minimum.
If you get this first board made in small quanties, turn it on then I think you will find unexpected things, good and bad, especially in regards to the lighting aspect of it.

[mcinnes01]

Ah cool that sounds interesting I might look in to that or if there is an attiny with additional channels, although I wonder how this will work when I need 10 channels in terms of the spi, I guess they would daisy chain but would they be addressable? I am having a play with the footprints now, and am just finishing off my silk screen. One thing that is a bit of a bummer is that batch pcb calculated the board size wrong originally, only taking 0.25" in to account for the width of the board so they were cheap at like $2.50 each, but it turns out they are more like $37.50 each. So I am going to go back to Seeed as you suggested originally, but this brings up the question of width again. Its currently 52mm how can I shave off 2mm to fit it in and did you say I needed to leave another mm or something? I sadly appreciate there may be errors, I hope no show stoppers but this is my first attempt and this stuff is a little out of my depths. What did you notice in regards to the lighting aspect of your boards as you worked through your revisions? Any degradation or did it improve? Thanks, Andy

[Magpie]

here is a list of pcb manufacturers in ol' blighty

pcb manufacturers


Or probably go with seeed.

Try editing the yellow pcb outline layer, I just looked at your board there is loads of room, but you may just have to reduce the copper pour a fraction.
Just fit (edit) the pcb edges to be 50mm apart. and move the copper pour to be at least say 1mm away. Move the fiducials too or you can just delete them.

Or when you are completely done with the other stuff I can do this step for you. I gave it a quick test it took just a few minutes.

the price from seeed is going to be $US 35.00 and if you waste $15 on something you dont want then you get free postage. The have a resistor book 805, but at $60 it is very expensive.

when you order from seeed you are not paying for service so do everything they say and it will be ok. I forgot my order number on one board but it didn't matter it still came. This time I put it under a big inductor so no-one could see it.

[mcinnes01]

Hi,

Ok I have changed the footprints for the new inductors I have now found that I can get from digikey which will make part ordering easier than getting stuff off ebay too. I don't know enough to know if these are right but I did a search on digikey, for 33uh, ferrite core, greater than 2amps, SMD, shielded and there were quite a few options, some as cheap as 42p per part so I wondered if these were ok? They have a different footprint or pad layout again requiring pads that run along the edge either side that are 3.6mm long, 1.8mm wind and 7.2mm apart. I worked out sometimes you have to step the line size down a little in order to connect to some components.

I have updated the footprints on the attached and tried to rejoin everything, but I get that thing again where I get a ton of errors on stuff I haven't touched and I can't work it out?

Off topic, I think I have found a house, had my first offer rejected and hoping this next offer is accepted, especially because I am already in the top percentile of my budget

When you get a moment I'd really appreciate it if you could cast your eye over the board, hopefully this should be almost on the way to production now once these DRC issues are resolved and if my board width and foot print alterations are right?

Thanks again and next time we speak I may have a house (fingers crossed), and then I can start looking at domestic light too.

Andy

PS thanks for the pcb links, I think I will definately go the seeed route, they seem far cheaper than others, plus I could add the colour finish to get up to $50.

Attached Files

•  Almost.zip   26.82KB   3 downloads

[Magpie]

Hi I found and fixed a new problem. I am learning as I go, I just noticed this. The problem is also on my expensive black boards for steff 3. damn it. Any work around I do is going to take a bit of work. The problem is the flooded zone on the ground plane, floods the ground kelvin connection, thereby negating its kelviness. I fixed it on your board by doing cutouts of the zones where it interferes with the kelvin connection. Attached is the repaired board. The Kelvin connection enables us to ADC some very low voltages. So it needs to be as noise and bias free as possible. I have checked drc, It said some tracks were too close. I didn't change them I just set the DRC clearance of all tracks to 0.2mm from 0.25mm and everything passed. Seeed studio should be ok with a clearance of 6mil or 0.15mm. the inductors seem to have the right footprint, they will solder fine. Good luck with the house.

Attached Files

•  SteffNearlyFinished_fixedcutouts.zip   25.51KB   3 downloads

Edited by Magpie, 12 November 2012 - 08:55 AM.

[mcinnes01]

Thanks thats really really great! I'm sure I do something wrong with the DRC I have the track clearance set to 0.2007mm, min via size of 0.8890mm and min uVia size of 0.5080mm, but I still get the same 13 errors? (unlucky for me ) The house should nearly be deal done but its really old and has some issues so I am just hoping I can afford to fix it up. Why do basements have to be so damp and subsidy! Oh well I guess I will have a lot more time to play with my netduino as I won't be able to afford to go out although I could be spending all my time fixing stuff . I'm going to do one last part and footprint check then get my parts ordered, thanks again for fixing up the kelvins, at least I know which tracks they are now, even if I'm not sure how to do them myself. I'm interested at some point in seeing if some of the larger attinys could be used to get more channels on one board and perhaps use the spi as suggested? Cheers, Andy

[Magpie]

Have you assigned all nets to track types that have the min clearance of 0.2? Try and investigate one DRC error, you should be able to reduce it to 0 errors. Recently I have only been using 1 track type, and assign every net to it. Then when I want to adjust the track or segment width I change the default width. It is because many of my tracks have different thicknesses. I go small as I approach the pins. I don't think this is how you are supposed to work, but it is quicker for me. I made another mistake with my boards, I think I sent the solder paste mask instead of the solder mask. Who knows what will come back, but it will be wrong. The solder paste mask is for making the stencils. Completely wrong. Fail. $50 dollars worth of Landfill. I don't know if you can find a bigger chip that has so much ADC. 3 differential channels is pretty darn good for a 20 pin chip. Addressing them using spi wont be such a problem but there is a bit of code to write and debug. Damp basement can probably be fixed with a fan or some fancy passive ventilation. If you can get the damp air out, you have a good chance. It iwll be good for the foundations to be a bit drier. Still it is a worry. Let me check the gerbers before manufacture.

Edited by Magpie, 12 November 2012 - 11:29 PM.

[Magpie]

PCB pre manufacture check list. Done with Kicad and Seeed in mind but should be applicable to most boards. TODO update as I think of more things to check. SCHEMATIC: schematic DRC passes ok. FOOTPRINTS: pcb foot prints are correct. PCB: design rules are set to match the manufacturer. Current general settings: Minimum value for tracks width: 0.2032 mm Minimum value for vias diameter: 0.8890 mm No microvias. all tracks, set min clearance .2 if possible then .17 if possible otherwise .15 as absolute min. do mount holes do flooded zones. add version and name of board. add order number if necessary add image? add info to silkscreen for all connectors, but not underneath. make sure silkscreen has orientation of all unipolar items. check mechanical clearances DRC passes. in preferences->dimensions->pad mask clearance. set global solder mask 0.3mm for very small check drill sizes are all standard (somehow) PLOT: probably turn component values off when generating gerbers. dont invert y axis Files: .drl Back.gbl front.gtl Mask_Back.gbs (dont confuse Mask with SolderPMask. (solder paste))_ Mask_Front.gts SilkS_Back.gbo SilkS_Front.gto subtract silkscreen from mask plot board outlines on layers GERBERS: Make sure all align. Make sure zones don't flood kelvin connections. make sure one via looks right. make sure one through hole pin looks right. make sure one top smd looks right. look at the smallest smd. check silkscreen isn't confusing and has all required details. check each layer individually to make sure clearance is ok. SENDING: Add Readme.txt with order/quote number Zip: 6 files + drill file + readme.txt make sure that the board outline is in gerbers